The automotive electric drive system is continuously evolving towards higher voltages (1200V) and higher levels of integration. Particularly, the high integration of "Embedded Die Substrate Package" brings incomparable advantages over traditional packaging: smaller size, better heat dissipation, superior electrical performance (low inductance, low resistance), and higher reliability. At the same time, the highly integrated and higher voltage applications pose new challenges to the insulation characteristics of these new types of packaging: Partial discharge.
It is due to the edge termination at the interface of different packaging materials, while switching to other materials with different dielectric properties, which causes a high concentration of electric field at the interface. Especially at the positions where there are microscopic local defects (bubbles, cracks, impurities, etc.) within the internal insulation system of the packaging. The occurrence of partial discharge promotes further discharge carbonization of the packaging material around the chip, and in severe cases, the release of high electric field transient energy can even damage the edges of chips with poor coating protection.
GRGTEST Based on this basis, further research verified the phenomenon of local discharge of 1200 VSiC chip packaging in embedded plate stage structure. Through in-depth research, we verify that the local discharge test combined with destructive physical analysis can be an effective analysis means to check whether such special packaging structures have microscopic defects. The actual test results not only confirm the typical failure location and morphology specified by the above electric field simulation, but also further clarify the typical failure mode caused by the defect of packaging holes around the chip.
The center actively lays out the frontier technology, and has accumulated rich analytical experience in the advanced packaging fields such as power packaging and 2.5D. At the same time, close to the customer research and development front line, in-depth cooperation to carry out a series of non-standard analysis and verification work.
